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19-3056; Rev 3; 1/05
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
General Description
The MAX7315 I2CTM-/SMBus-compatible serial interfaced peripheral provides microprocessors with 8 I/O ports. Each I/O port can be individually configured as either an open-drain current-sinking output rated at 50mA at 5.5V, or a logic input with transition detection. A ninth port can be used for transition detection interrupt or as a generalpurpose output. The outputs are capable of directly driving LEDs, or providing logic outputs with external resistive pullup up to 5.5V. PWM current drive is integrated with 8 bits of control. Four bits are global control and apply to all LED outputs to provide coarse adjustment of current from fully off to fully on in 14 intensity steps. Each output then has individual 4-bit control, which further divides the globally set current into 16 more steps. Alternatively, the current control can be configured as a single 8-bit control that sets all outputs at once. The MAX7315 is pin and software compatible with the PCA9534 and PCA9554(A). Each output has independent blink timing with two blink phases. All LEDs can be individually set to be on or off during either blink phase, or to ignore the blink control. The blink period is controlled by a register. The MAX7315 supports hot insertion. All port pins, the INT output, SDA, SCL, and the slave address inputs ADO-2 remain high inpedance in power-down (V+ = 0V) with up to 6V asserted upon them. The MAX7315 is controlled through the 2-wire I2C/SMBus serial interface, and can be configured to one of 64 I2C addresses.
Features
400kbps, 2-Wire Serial Interface, 5.5V Tolerant 2V to 3.6V Operation Overall 8-Bit PWM LED Intensity Control Global 16-Step Intensity Control Plus Individual 16-Step Intensity Control Automatic Two-Phase LED Blinking 50mA Maximum Port Output Current Supports Hot Insertion Outputs Are 5.5V-Rated Open Drain Inputs Are Overvoltage Protected to 5.5V Transition Detection with Interrupt Output Low Standby Current (1.2A typ; 3.3A max) Tiny 3mm x 3mm, Thin QFN Package -40C to +125C Temperature Range All Ports Can Be Configured as Inputs or Outputs
MAX7315
Ordering Information
PINTOP PKG PACKAGE MARK CODE 16 Thin QFN MAX7315ATE -40C to +125C 3mm x 3mm AAU T1633-4 x 0.8mm MAX7315AEE -40C to +125C 16 QSOP -- -- PART TEMP RANGE MAX7315AUE -40C to +125C 16 TSSOP -- --
Applications
LCD Backlights LED Status Indication Portable Equipment Laptop Computers Keypad Backlights RGB LED Drivers Cellular Phones
SDA V+ ADO 13 14 15 16 1 AD2
SCL TOP VIEW
Pin Configurations
INT/O8 P7 10
P6
12
11
9 8 7 P5 P4 GND P3
MAX7315ATE
6 5
Typical Application Circuit appears at end of data sheet. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.
AD1
2
P0
3 P1
4 P2
THIN QFN
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
ABSOLUTE MAXIMUM RATINGS
Voltage (with respect to GND) V+ .............................................................................-0.3V to +4V SCL, SDA, AD0, AD1, AD2, P0-P7 ..........................-0.3V to +6V INT/O8 .....................................................................-0.3V to +8V DC Current on P0-P7, INT/O8 ............................................55mA DC Current on SDA.............................................................10mA Maximum GND Current ....................................................190mA Continuous Power Dissipation (TA = +70C) 16-Pin TSSOP (derate 9.4mW/C over +70C) ............754mW 16-Pin QSOP (derate 8.3mW/C over +70C)..............666mW 16-Pin QFN (derate 14.7mW/C over +70C) ............1176mW Operating Temperature Range (TMIN to TMAX)-40C to +125C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Operating Supply Voltage Output Load External Supply Voltage Standby Current (Interface Idle, PWM Disabled) SYMBOL V+ VEXT SCL and SDA at V+; other digital inputs at V+ or GND; PWM intensity control disabled SCL and SDA at V+; other digital inputs at V+ or GND; PWM intensity control enabled fSCL = 400kHz; other digital inputs at V+ or GND; PWM intensity control disabled fSCL = 400kHz; other digital inputs at V+ or GND; PWM intensity control enabled TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX TA = +25C TA = -40C to +85C TA = TMIN to TMAX 0.7 V+ 51 40 7 CONDITIONS MIN 2 0 1.2 TYP MAX 3.6 5.5 2.3 2.6 3.3 12.1 13.5 14.4 76 78 80 110 117 122 V A A A A UNITS V V
I+
Supply Current (Interface Idle, PWM Enabled) Supply Current (Interface Running, PWM Disabled) Supply Current (Interface Running, PWM Enabled) Input High Voltage SDA, SCL, AD0, AD1, AD2, P0-P7 Input Low Voltage SDA, SCL, AD0, AD1, AD2, P0-P7 Input Leakage Current SDA, SCL, AD0, AD1, AD2, P0-P7 Input Capacitance SDA, SCL, AD0, AD1, AD2, P0-P7
I+
I+
I+
VIH
VIL
0.3 V+
V
IIH, IIL
Input = GND or V+
-0.2
+0.2
A
8
pF
2
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
ELECTRICAL CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA= + 25C.) (Note 1)
PARAMETER SYMBOL CONDITIONS TA = +25C V+ = 2V, ISINK = 20mA TA = -40C to +85C TA = TMIN to TMAX Output Low Voltage P0-P7, INT/O8 TA = +25C VOL V+ = 2.5V, ISINK = 20mA TA = -40C to +85C TA = TMIN to TMAX TA = +25C V+ = 3.3V, ISINK = 20mA Output Low-Voltage SDA PWM Clock Frequency VOLSDA fPWM ISINK = 6mA 32 TA = -40C to +85C TA = TMIN to TMAX 0.12 0.13 MIN TYP 0.15 MAX 0.25 0.29 0.31 0.22 0.25 0.27 0.22 0.23 0.25 0.4 V kHz V UNITS
MAX7315
TIMING CHARACTERISTICS
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Serial Clock Frequency Bus Free Time Between a STOP and a START Condition Hold Time, Repeated START Condition Repeated START Condition Setup Time STOP Condition Setup Time Data Hold Time Data Setup Time SCL Clock Low Period SCL Clock High Period Rise Time of Both SDA and SCL Signals, Receiving Fall Time of Both SDA and SCL Signals, Receiving Fall Time of SDA Transmitting Pulse Width of Spike Suppressed Capacitive Load for Each Bus Line SYMBOL fSCL tBUF tHD, STA tSU, STA tSU, STO tHD, DAT tSU, DAT tLOW tHIGH tR tF tF.TX tSP Cb (Notes 3, 4) (Notes 3, 4) (Notes 3, 5) (Note 6) (Note 3) (Note 2) 180 1.3 0.7 200 + 0.1Cb 200 + 0.1Cb 200 + 0.1Cb 50 400 300 300 250 1.3 0.6 0.6 0.6 0.9 CONDITIONS MIN TYP MAX 400 UNITS kHz s s s s s ns s s ns ns ns ns pF
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
TIMING CHARACTERISTICS (continued)
(Typical Operating Circuit, V+ = 2V to 3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = 3.3V, TA = +25C.) (Note 1)
PARAMETER Interrupt Valid Interrupt Reset Output Data Valid Input Data Setup Time Input Data Hold Time SYMBOL tIV tIR tDV tDS tDH CONDITIONS Figure 10 Figure 10 Figure 10 Figure 10 Figure 10 100 1 MIN TYP MAX 6.5 1 5 UNITS s s s ns s
Note 1: All parameters tested at TA = +25C. Specifications over temperature are guaranteed by design. Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge the undefined region of SCL's falling edge. Note 3: Guaranteed by design. Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 x VDD. Note 5: ISINK 6mA. Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 x VDD. Note 6: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE (PWM DISABLED; fSCL = 400kHz)
MAX7315 toc02 MAX7315 toc01
STANDBY CURRENT vs. TEMPERATURE
10 9 STANDBY CURRENT (A) 8 7 6 5 4 3 2 1 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) V+ = 2V PWM ENABLED V+ = 2.7V V+ = 3.6V PWM ENABLED PWM V+ = 2V V+ = 2.7V PWM DISABLED PWM DISABLED DISABLED V+ = 3.6V PWM ENABLED 70 60 SUPPLY CURRENT (A) 50 40
SUPPLY CURRENT vs. TEMPERATURE (PWM ENABLED; fSCL = 400kHz)
70 65 60 55 50 45 40 35 30 25 20 15 10 5 0
MAX7315 toc03
V+ = 3.6V
SUPPLY CURRENT (A)
V+ = 3.6V
V+ = 2.7V V+ = 2V
V+ = 2.7V 30 20 10 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C) V+ = 2V
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
PORT OUTPUT LOW VOLTAGE WITH 50mA LOAD CURRENT vs. TEMPERATURE
MAX7315 toc04
PORT OUTPUT LOW VOLTAGE WITH 20mA LOAD CURRENT vs. TEMPERATURE
MAX7315 toc05
PWM CLOCK FREQUENCY vs. TEMPERATURE
MAX7315 toc06
0.6 PORT OUTPUT LOW VOLTAGE VOL (V) 0.5 V+ = 2.7V 0.4 0.3 0.2 0.1 0 V+ = 3.6V V+ = 2V
0.6 PORT OUTPUT LOW VOLTAGE VOL (V) 0.5 0.4 0.3 0.2 0.1 0
ALL OUTPUTS LOADED
1.050 1.025 PWM CLOCK FREQUENCY 1.000 0.975 0.950 0.925 0.900 NORMALIZED TO V+ = 3.3V, TA = +25C V+ = 2V
V+ = 3.6V
V+ = 2V
V+ = 2.7V
V+ = 2.7V
V+ = 3.6V
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
-40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (C)
SCOPE SHOT OF 2 OUTPUT PORTS
MAX7315 toc07
SCOPE SHOT OF 2 OUTPUT PORTS
MAX7315 toc08
SINK CURRENT vs. VOL
0.30 0.25 VOL (V) 0.20 V+ = 3.3V 0.15 V+ = 3.6V 0.10 0.05 0 ONLY ONE OUTPUT LOADED 0 10 20 30 40 50
MAX7315 toc09
MASTER INTENSITY SET TO 1/15 OUTPUT 1 2V/div OUTPUT 1 INDIVIDUAL INTENSITY SET TO 1/16
0.35 OUTPUT 1, 2V/div V+ = 2V V+ = 2.7V
MASTER INTENSITY SET TO 14/15
OUTPUT 1 INDIVIDUAL INTENSITY SET TO 1/16
OUTPUT 2 2V/div OUTPUT 2 INDIVIDUAL INTENSITY SET TO 15/16 2ms/div OUTPUT 2 INDIVIDUAL INTENSITY SET TO 14/15 2ms/div
OUTPUT 2, 2V/div
SINK CURRENT (mA)
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Pin Description
PIN NAME QSOP/TSSOP 1, 2, 3 4-7, 9-12 8 13 14 15 16 -- QFN 15, 16, 1 2-5, 7-10 6 11 12 13 14 PAD AD0, AD1, AD2 P0-P7 GND INT/O8 SCL SDA V+ Exposed pad Address Inputs. Sets device slave address. Connect to either GND, V+, SCL, or SDA to give 64 logic combinations. See Table 1. Input/Output Ports. P0-P7 are open-drain I/Os rated at 5.5V, 50mA. Ground. Do not sink more than 190mA into the GND pin. Output Port. Open-drain output rated at 7.0V, 50mA. Configurable as interrupt output or general-purpose output. I2C-Compatible Serial Clock Input I2C-Compatible Serial Data I/O Positive Supply Voltage. Bypass V+ to GND with a 0.047F ceramic capacitor Exposed Pad on Package Underside. Connect to GND. FUNCTION
DATA FROM SHIFT REGISTER CONFIGURATION REGISTER D Q FF WRITE CONFIGURATION PULSE CK Q OUTPUT PORT REGISTER D Q FF WRITE PULSE CK Q I/O PIN Q2 INPUT PORT REGISTER D Q FF READ PULSE CK Q TO INT GND INPUT PORT REGISTER DATA OUTPUT PORT REGISTER DATA
DATA FROM SHIFT REGISTER
Figure 1. Simplified Schematic of I/O Ports
Functional Overview
The MAX7315 is a general-purpose input/output (GPIO) peripheral that provides eight I/O ports, P0-P7, controlled through an I2C-compatible serial interface. A 9th output-only port, INT/O8, can be configured as an interrupt output or as a general-purpose output port. All output ports sink loads up to 50mA connected to external supplies up to 5.5V, independent of the MAX7315's
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supply voltage. The MAX7315 is rated for a ground current of 190mA, allowing all nine outputs to sink 20mA at the same time. Figure 1 shows the output structure of the MAX7315. The ports default to inputs on power-up.
Port Inputs and Transition Detection
An input ports register reflects the incoming logic levels of the port pins, regardless of whether the pin is defined as an input or an output. Reading the input
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
ports register latches the current-input logic level of the affected eight ports. Transition detection allows all ports configured as inputs to be monitored for changes in their logic status. The action of reading the input ports register samples the corresponding 8 port bits' input condition. This sample is continuously compared with the actual input conditions. A detected change in input condition causes the INT/O8 interrupt output to go low, if configured as an interrupt output. The interrupt is cleared either automatically if the changed input returns to its original state, or when the input ports register is read. The INT/O8 pin can be configured as either an interrupt output or as a 9th output port with the same static or blink controls as the other eight ports (Table 4). PWM intensity control uses a 4-bit master control and 4 bits of individual control per output (Tables 13, 14). The 4-bit master control provides 16 levels of overall intensity control, which applies to all PWM-enabled output ports. The master control sets the maximum pulse width from 1/15 to 15/15 of the PWM time period. The individual settings comprise a 4-bit number further reducing the duty cycle to be from 1/16 to 15/16 of the time window set by the master control. For applications requiring the same PWM setting for all output ports, a single global PWM control can be used instead of all the individual controls to simplify the control software and provide 240 steps of intensity control (Tables 10 and 13).
MAX7315
Standby Mode
When the serial interface is idle and the PWM intensity control is unused, the MAX7315 automatically enters standby mode. If the PWM intensity control is used, the operating current is slightly higher because the internal PWM oscillator is running. When the serial interface is active, the operating current also increases because the MAX7315, like all I2C slaves, has to monitor every transmission.
Port Output Control and LED Blinking
The blink phase 0 register sets the output logic levels of the eight ports P0-P7 (Table 8). This register controls the port outputs if the blink function is disabled. A duplicate register, the blink phase 1 register, is also used if the blink function is enabled (Table 9). In blink mode, the port outputs can be flipped between using the blink phase 0 register and the blink phase 1 register using software control (the blink flip flag in the configuration register) (Table 4).
Serial Interface
Serial Addressing
The MAX7315 operates as a slave that sends and receives data through an I2C-compatible 2-wire interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). A master (typically a microcontroller) initiates all data transfers to and from the MAX7315 and generates the SCL clock that synchronizes the data transfer (Figure 2). The MAX7315 SDA line operates as both an input and an open-drain output. A pullup resistor, typically 4.7k, is required on SDA. The MAX7315 SCL line operates
PWM Intensity Control
The MAX7315 includes an internal oscillator, nominally 32kHz, to generate PWM timing for LED intensity control. PWM intensity control can be enabled on an output-by-output basis, allowing the MAX7315 to provide any mix of PWM LED drives and glitch-free logic outputs (Table 10). PWM can be disabled entirely, in which case all output ports are static and the MAX7315 operating current is lowest because the internal oscillator is turned off.
SDA tSU,STA tHD,DAT tHIGH tBUF tHD,STA tSU,STO
tLOW
tSU,DAT
SCL tHD,STA tR START CONDITION
tF REPEATED START CONDITION STOP CONDITION START CONDITION
Figure 2. 2-Wire Serial Interface Timing Details _______________________________________________________________________________________ 7
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
only as an input. A pullup resistor, typically 4.7k, is required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition (Figure 3) sent by a master, followed by the MAX7315 7-bit slave address plus R/W bit, a register address byte, one or more data bytes, and finally a STOP condition (Figure 3). Start and Stop Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, it issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 3). Bit Transfer One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 4). Acknowledge The acknowledge bit is a clocked 9th bit that the recipient uses to handshake receipt of each byte of data (Figure 5). Thus, each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse so the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7315, the device generates the acknowledge bit because the MAX7315 is the recipient. When the MAX7315 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. Slave Address The MAX7315 has a 7-bit long slave address (Figure 6). The eighth bit following the 7-bit slave address is the R/W bit. The R/W bit is low for a write command, high for a read command. The slave address bits A6 through A0 are selected by the address inputs AD0, AD1, and AD2. These pins can be connected to GND, V+, SDA, or SCL. The MAX7315 has 64 possible slave addresses (Table 1) and, therefore, a maximum of 64 MAX7315 devices can be controlled independently from the same interface.
CLOCK PULSE FOR ACKNOWLEDGE 1 2 8 9
SDA SCL
S
P STOP CONDITION
START CONDITION
Figure 3. Start and Stop Conditions
SDA
SCL DATA LINE STABLE; CHANGE OF DATA DATA VALID ALLOWED
Figure 4. Bit Transfer
START CONDITION SCL SDA BY TRANSMITTER SDA BY RECEIVER S
Figure 5. Acknowledge
Message Format for Writing the MAX7315 A write to the MAX7315 comprises the transmission of the MAX7315's slave address with the R/W bit set to zero, followed by at least 1 byte of information. The first byte of information is the command byte. The command byte determines which register of the MAX7315 is to be written to by the next byte, if received (Table 2). If a STOP condition is detected after the command byte is received, then the MAX7315 takes no further action beyond storing the command byte.
SDA
A6 MSB
A5
A4
A3
A2
A1
A0 LSB
R/W
ACK
SCL
Figure 6. Slave Address 8 _______________________________________________________________________________________
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
Table 1. MAX7315 I2C Slave Address Map
PIN AD2 GND GND GND GND V+ V+ V+ V+ GND GND GND GND V+ V+ V+ V+ GND GND GND GND V+ V+ V+ V+ GND GND GND GND V+ V+ V+ V+ PIN AD1 SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL SDA SDA GND GND V+ V+ GND GND V+ V+ GND GND V+ V+ GND GND V+ V+ PIN AD0 A6 GND V+ GND V+ GND V+ GND V+ SCL SDA SCL SDA SCL SDA SCL SDA GND V+ GND V+ GND V+ GND V+ SCL SDA SCL SDA SCL SDA SCL SDA 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICE ADDRESS A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
MAX7315
9
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 1. MAX7315 I2C Slave Address Map (continued)
PIN AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PIN AD1 SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL SDA SDA GND GND V+ V+ GND GND V+ V+ GND GND V+ V+ GND GND V+ V+ PIN AD0 A6 GND V+ GND V+ GND V+ GND V+ SCL SDA SCL SDA SCL SDA SCL SDA GND V+ GND V+ GND V+ GND V+ SCL SDA SCL SDA SCL SDA SCL SDA 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 A4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 DEVICE ADDRESS A3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
10
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
COMMAND BYTE IS STORED ON RECEIPT OF STOP CONDITION ACKNOWLEDGE FROM MAX7315 S SLAVE ADDRESS R/W 0 A D15 D14 D13 D12 D11 D10 D9 D8
COMMAND BYTE ACKNOWLEDGE FROM MAX7315
A
P
Figure 7. Command Byte Received
ACKNOWLEDGE FROM MAX7315 HOW COMMAND BYTE AND DATA BYTE MAP INTO MAX7315'S REGISTERS ACKNOWLEDGE FROM MAX7315 S SLAVE ADDRESS R/W 0 A COMMAND BYTE A D15 D14 D13 D12 D11 D10 D9 D8 D7 D6
ACKNOWLEDGE FROM MAX7315 D5 D4 D3 D2 D1 D0
DATA BYTE 1 BYTE AUTOINCREMENT MEMORY ADDRESS
A
P
Figure 8. Command and Single Data Byte Received
ACKNOWLEDGE FROM MAX7315 HOW COMMAND BYTE AND DATA BYTE MAP INTO MAX7315'S REGISTERS ACKNOWLEDGE FROM MAX7315 S SLAVE ADDRESS R/W 0 A COMMAND BYTE A D15 D14 D13 D12 D11 D10 D9 D8 D7 D6
ACKNOWLEDGE FROM MAX7315 D5 D4 D3 D2 D1 D0
DATA BYTE N BYTES AUTOINCREMENT MEMORY ADDRESS
A
P
Figure 9. n Data Bytes Received
Any bytes received after the command byte are data bytes. The first data byte goes into the internal register of the MAX7315 selected by the command byte (Figure 8). If multiple data bytes are transmitted before a STOP condition is detected, these bytes are generally stored in subsequent MAX7315 internal registers because the command byte address autoincrements (Table 2). A diagram of a write to the output ports registers (blink phase 0 register or blink phase 1 register) is given in Figure 10. Message Format for Reading The MAX7315 is read using the MAX7315's internally stored command byte as an address pointer the same way the stored command byte is used as an address pointer for a write. The pointer autoincrements after each data byte is read using the same rules as for a write (Table 2). Thus, a read is initiated by first configuring the MAX7315's command byte by performing a write (Figure 7). The master can now read n consecu-
tive bytes from the MAX7315 with the first data byte being read from the register addressed by the initialized command byte. When performing read-after-write verification, remember to reset the command byte's address because the stored command byte address has been autoincremented after the write (Table 2). A diagram of a read from the input ports register is shown in Figure 10 reflecting the states of the ports.
Operation with Multiple Masters
If the MAX7315 is operated on a 2-wire interface with multiple masters, a master reading the MAX7315 should use a repeated start between the write, which sets the MAX7315's address pointer, and the read(s) that takes the data from the location(s) (Table 2). This is because it is possible for master 2 to take over the bus after master 1 has set up the MAX7315's address pointer but before master 1 has read the data. If master 2 subsequently changes the MAX7315's address pointer, then master 1's delayed read can be from an unexpected location.
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
WRITE TO OUTPUT PORTS REGISTERS (BLINK PHASE 0 REGISTERS/BLINK PHASE 1 REGISTERS) SCL 1 2 3 4 5 6 7 8 0 9 COMMAND BYTE A 0 0 0 0 0 0 0 1 A MSB DATA1 LSB A MSB DATA2 LSB A P
SLAVE ADDRESS SDA S A6 A5 A4 A3 A2 A1 A0
START CONDITION P7-P0
R/W ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM SLAVE
ACKNOWLEDGE FROM SLAVE DATA1 VALID tDV tDV
STOP CONDITION DATA2 VALID
READ FROM INPUT PORTS REGISTERS SCL 1 2 3 4 5 6 7 8 9 COMMAND BYTE A MSB DATA1 LSB A MSB DATA4 LSB NA P STOP CONDITION START CONDITION P7-P0 DATA1 R/W ACKNOWLEDGE FROM SLAVE DATA2 tDH DATA3 tDS ACKNOWLEDGE FROM MASTER DATA4 NO ACKNOWLEDGE FROM MASTER
SLAVE ADDRESS SDA S A6 A5 A4 A3 A2 A1 A0 1
INTERRUPT VALID/RESET SCL 1 2 3 4 5 6 7 8 9 COMMAND BYTE A MSB DATA2 LSB A MSB DATA4 LSB NA P STOP CONDITION START CONDITION P7-P0 INT tIV tIR tIV tIR DATA1 R/W ACKNOWLEDGE FROM SLAVE DATA2 ACKNOWLEDGE FROM MASTER DATA3 NO ACKNOWLEDGE FROM MASTER
SLAVE ADDRESS SDA S A6 A5 A4 A3 A2 A1 A0 1
Figure 10. Read, Write, and Interrupt Timing Diagrams
Command Address Autoincrementing
The command address stored in the MAX7315 circulates around grouped register functions after each data byte is written or read (Table 2).
Detailed Description
Initial Power-Up
On power-up all control registers are reset and the MAX7315 enters standby mode (Table 3). Power-up status makes all ports into inputs and disables both the PWM oscillator and blink functionality.
Device Reset
If a device reset input is needed, consider the MAX7316. The MAX7316 includes a RST input, which clears any transaction to or from the MAX7316 on the serial interface and configures the internal registers to the same state as a power-up reset.
Configuration Register
The configuration register is used to configure the PWM intensity mode, interrupt, and blink behavior, operate the INT/O8 output, and read back the interrupt status (Table 4).
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 2. Register Address Map
REGISTER Read input ports Blink phase 0 outputs Ports configuration Blink phase 1 outputs Master, O8 intensity Configuration Outputs intensity P1, P0 Outputs intensity P3, P2 Outputs intensity P5, P4 Outputs intensity P7, P6 ADDRESS CODE (HEX) 0x00 0x01 0x03 0x09 0x0E 0x0F 0x10 0x11 0x12 0x13 AUTOINCREMENT ADDRESS 0x00 (no change) 0x01 (no change) 0x03 (no change) 0x09 (no change) 0x0E (no change) 0x0F (no change) 0x11 0x12 0x13 0x10
Ports Configuration
The 8 I/O ports P0 through P7 can be configured to any combination of inputs and outputs using the ports configuration register (Table 5). The INT/O8 output can also be configured as an extra general-purpose output using the configuration register (Table 4). Input Ports The input ports register is read only (Table 6). It reflect the incoming logic levels of the ports, regardless of whether the port is defined as an input or an output by the ports configuration register. Reading the input ports register latches the current-input logic level of the affected eight ports. A write to the input ports register is ignored. Transition Detection All ports configured as inputs are always monitored for changes in their logic status. The action of reading the input ports register or writing to the configuration register samples the corresponding 8 port bits' input condition (Tables 4, 6). This sample is continuously compared with the actual input conditions. A detected change in input condition causes an interrupt condition. The interrupt is cleared either automatically if the changed input returns to its original state, or when the input ports register is read, updating the compared data (Figure 10). Randomly changing a port from an output to an input may cause a false interrupt to occur if the state of the input does not match the content of the input ports register. The interrupt status is available as the interrupt flag INT in the configuration register (Table 4). The input status of all ports is sampled immediately after power-up as part of the MAX7315's internal initial-
ization, so if all the ports are pulled to valid logic levels at that time an interrupt does not occur at power-up.
INT/O8 Output The INT/O8 output pin can be configured as either the INT output that reflects the interrupt flag logic state or as a general-purpose output O8. When used as a generalpurpose output, the INT/O8 pin has the same blink and PWM intensity control capabilities as the other ports. Set the interrupt enable I bit in the configuration register to configure INT/O8 as the INT output (Table 4). Clear interrupt enable to configure INT/O8 as the O8. O8 logic state is set by the 2 bits O1 and O0 in the configuration register. O8 follows the rules for blinking selected by the blink enable flag E in the configuration register. If blinking is disabled, then interrupt output control O0 alone sets the logic state of the INT/O8 pin. If blinking is enabled, then both interrupt output controls O0 and O1 set the logic state of the INT/O8 pin according to the blink phase. PWM intensity control for O8 is set by the 4 global intensity bits in the master, O8 intensity register (Table 13).
Blink Mode
In blink mode, the output ports can be flipped between using either the blink phase 0 register or the blink phase 1 register. Flip control is by software control (the blink flip flag B in the configuration register) (Table 4). If hardware flip control is needed, consider the MAX7316, which includes a BLINK input, as well as software control. The blink function can be used for LED effects by programming different display patterns in the two sets of
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 3. Power-Up Configuration
REGISTER FUNCTION Blink phase 0 outputs P7-P0 Ports configuration P7-P0 Blink phase 1 outputs P7-P0 Master, O8 intensity POWER-UP CONDITION High-impedance outputs Ports P7-P0 are inputs High-impedance outputs PWM oscillator is disabled; O8 is static logic output INT/O8 is interrupt output; blink is disabled; global intensity is enabled P1, P0 are static logic outputs P3, P2 are static logic outputs P5, P4 are static logic outputs P7, P6 are static logic outputs ADDRESS CODE (HEX) 0x01 0x03 0x09 0x0E REGISTER DATA D7 1 1 1 0 D6 1 1 1 0 D5 1 1 1 0 D4 1 1 1 0 D3 1 1 1 1 D2 1 1 1 1 D1 1 1 1 1 D0 1 1 1 1
Configuration Outputs intensity P1, P0 Outputs Intensity P3, P2 Outputs intensity P5, P4 Outputs intensity P7, P6
0x0F 0x10 0x11 0x12 0x13
0 1 1 1 1
0 1 1 1 1
0 1 1 1 1
0 1 1 1 1
1 1 1 1 1
1 1 1 1 1
0 1 1 1 1
0 1 1 1 1
Table 4. Configuration Register
REGISTER ADDRESS CODE (HEX) R/W CONFIGURATION REGISTER DATA D7 INTERRUPT STATUS D6 D5 D4 D3 INTERRUPT ENABLE D2 GLOBAL INTENSITY D1 BLINK FLIP D0 BLINK ENABLE E 0 1 1 1 X X
Write device configuration Read-back device configuration Disable blink Enable blink Flip blink register (see text) Disable global intensity control--intensity is set by registers 0x10-0x13 for ports P0 through P7 when configured as outputs, and by D3-D7 of register 0x0E for INT/O8 when INT/O8 pin is configured as an output port Enable global intensity control--intensity for all ports configured as outputs is set by D3-D0 of register 0x0E
0 1 -- -- -- -- 0x0F
INT X X X X
X O X X X X
O1 X X X X
INTERRUPT OUTPUT CONTROL AS GPO O0 X X X X
--
I X X X X
G X X X X
B X X 0 1
--
X
X
X
X
X
0
X
--
X
X
X
X
X
1
X
X = Don't care.
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
Table 4. Configuration register (continued)
REGISTER ADDRESS CODE (HEX) R/W CONFIGURATION REGISTER DATA D7 INTERRUPT STATUS D6 D5 D4 D3 INTERRUPT ENABLE D2 GLOBAL INTENSITY D1 BLINK FLIP D0 BLINK ENABLE E X 0 0 1 1 1 1 X X
MAX7315
Disable data change interrupt--INT/O8 output is controlled by the O0 and O1 bits Enable data change interrupt--INT/O8 output is controlled by port input data change INT/O8 output is low (blink is disabled) INT/O8 output is high impedance (blink is disabled) INT/O8 output is low during blink phase 0 INT/O8 output is high impedance during blink phase 0 INT/O8 output is low during blink phase 1 INT/O8 output is high impedance during blink phase 1 Read-back data change interrupt status --data change is not detected, and INT/O8 output is high when interrupt enable (I bit) is set Read-back data change interrupt status --data change is detected, and INT/O8 output is low when interrupt enable (I bit) is set
--
INT
X O X X X X X X X
O1
INTERRUPT OUTPUT CONTROL AS GPO O0
--
I
G
B
-- -- -- -- -- -- -- 0x0F
X X X X X X X
X X X X X 0 1
X 0 1 0 1 X X
1 0 0 0 0 0 0
X X X X X X X
X X X X X X X
1
0
0
X
X
X
X
X
1
1
0
X
X
X
X
X
X = Don't care.
output port registers, and using the software or hardware controls to flip between the patterns. If the blink phase 1 register is written with 0xFF, then the BLINK input can be used as a hardware disable to, for example, instantly turn off an LED pattern programmed into the blink phase 0 register. This technique can be further extended by driving the BLINK input with a PWM signal to modulate the LED current to provide fading effects. The blink mode is enabled by setting the blink enable flag E in the configuration register (Table 4). When blink mode is enabled, the state of the blink flip flag sets the phase, and the output ports are set by either the blink
phase 0 register or the blink phase 1 register (Table 7). The blink mode is disabled by clearing the blink enable flag E in the configuration register (Table 4). When blink mode is disabled, the blink phase 0 register alone controls the output ports.
Blink Phase Registers
When the blink function is disabled, the blink phase 0 register sets the logic levels of the 8 ports (P0 through P7) when configured as outputs (Table 8). A duplicate register called the blink phase 1 register is also used if the blink function is enabled (Table 9). A logic high sets the appropriate output port high impedance, while a logic low makes the port go low.
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 5. Ports Configuration Register
REGISTER R/W ADDRESS CODE (HEX) REGISTER DATA D7 OP7 D6 OP6 D5 OP5 D4 OP4 D3 OP3 D2 OP2 D1 OP1 D0 OP0
Ports configuration (1 = input, 0 = output) Read-back ports configuration
0 1
0x03
Table 6. Input Ports Register
REGISTER Read input ports R/W 1 ADDRESS CODE (HEX) 0x00 REGISTER DATA D7 IP7 D6 IP6 D5 IP5 D4 IP4 D3 IP3 D2 IP2 D1 IP1 D0 IP0
Reading a blink phase register reads the value stored in the register, not the actual port condition. The port output itself may or may not be at a valid logic level, depending on the external load connected. The 9th output, O8, is controlled through 2 bits in the configuration register, which provide the same static or blink control as the other 8 output ports.
PWM Intensity Control
The MAX7315 includes an internal oscillator, nominally 32kHz, to generate PWM timing for LED intensity control or other applications such as PWM trim DACs. PWM can be disabled entirely for all the outputs. In this case, all outputs are static and the MAX7315 operating current is lowest because the internal PWM oscillator is turned off. The MAX7315 can be configured to provide any combination of PWM outputs and glitch-free logic outputs. Each PWM output has an individual 4-bit intensity control (Table 14). When all outputs are to be used with the same PWM setting, the outputs can be controlled together instead using the global intensity control (Table 13). Table 10 shows how to set up the MAX7315 to suit a particular application. PWM Timing The PWM control uses a 240-step PWM period, divided into 15 master intensity timeslots. Each master intensity timeslot is divided further into 16 PWM cycles (Figure 11). The master intensity operates as a gate, allowing the individual output settings to be enabled from 1 to 15 timeslots per PWM period (Figures 12, 13, 14) (Table 13). Each output's individual 4-bit intensity control only operates during the number of timeslots gated by the master intensity. The individual controls provide 16
16
intensity settings from 1/16 through 16/16 (Table 14). Figures 15, 16, and 17 show examples of individual intensity control settings. The highest value an individual or global setting can be set to is 16/16. This setting forces the output to ignore the master control, and follow the logic level set by the appropriate blink phase register bit. The output becomes a glitch-free static output with no PWM. Using PWM Intensity Controls with Blink Disabled When blink is disabled (Table 7), the blink phase 0 register specifies each output's logic level during the PWM on-time (Table 8). The effect of setting an output's blink phase 0 register bit to 0 or 1 is shown in Table 11. With its output bit set to zero, an LED can be controlled with 16 intensity settings from 1/16th duty through fully on, but cannot be turned fully off using the PWM intensity control. With its output bit set to 1, an LED can be controlled with 16 intensity settings from fully off through 15/16th duty.
Table 7. Blink Controls
BLINK ENABLE FLAG E 0 BLINK FLIP FLAG B X 0 1 1 Enabled Blink phase 1 register BLINK FUNCTION Disabled OUTPUT REGISTERS USED Blink phase 0 register Blink phase 0 register
X = Don't care.
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
Using PWM Intensity Controls with Blink Enabled When blink is enabled (Table 7), the blink phase 0 register and blink phase 1 register specify each output's logic level during the PWM on-time during the respective blink phases (Tables 8 and 9). The effect of setting an output's blink phase X register bit to 0 or 1 is shown in Table 12. LEDs can be flipped between either directly on and off, or between a variety of high/low PWM intensities. Global/O8 Intensity Control The 4 bits used for output O8's PWM individual intensity setting also double as the global intensity control (Table 13). Global intensity simplifies the PWM settings when the application requires them all to be the same, such as for backlight applications, by replacing the 9 individual settings with 1 setting. Global intensity is enabled with the global intensity flag G in the configuration register (Table 4). When global PWM control is used, the 4 bits of master intensity and 4 bits of O8 intensity effectively combine to provide an 8 bit, 240step intensity control applying to all outputs. It is not possible to apply global PWM control to a subset of the ports, and use the others as logic outputs. To mix static logic outputs and PWM outputs, individual PWM control must be selected (Table 10).
Output Level Translation
The open-drain output architecture allows the ports to level translate the outputs to higher or lower voltages than the MAX7315 supply. An external pullup resistor can be used on any output to convert the high-impedance logic-high condition to a positive voltage level. The resistor can be connected to any voltage up to 5.5V. For interfacing CMOS inputs, a pullup resistor value of 220k is a good starting point. Use a lower resistance to improve noise immunity, in applications where power consumption is less critical, or where a faster rise time is needed for a given capacitive load.
MAX7315
Compatibility with PCA9534 and PCA9554(A)
The MAX7315 is pin compatible and software compatible with PCA9534, and its variants PCA9554 and PCA9554A. However, some PCA9534 and PCA9554(A) functions are not implemented in the MAX7315, and the MAX7315's PWM and blink functionality is not supported in the PCA9534 and PCA9554(A). Software compatibility is clearly not 100%, but the MAX7315 was designed so the subset (omitted) features default to the same powerup behavior as the PCA9534 and PCA9554(A), and the superset features do not use existing registers in a different way. In practice, many applications can use the MAX7315 as a drop-in replacement for the PCA9534 or PCA9554(A) with no software change.
Applications Information
Hot Insertion
I/O ports PO-P7, interrupt output INT/08, and serial interface SDA, SCL, AD0-2 remain high impedance with up to 6V asserted on them when the MAX7315 is powered down (V+ = 0V). The MAX7315 can therefore be used in hot-swap applications.
Driving LED Loads
When driving LEDs, a resistor in series with the LED must be used to limit the LED current to no more than 50mA. Choose the resistor value according to the following formula: RLED = (VSUPPLY - VLED - VOL) / ILED
Table 8. Blink Phase 0 Register
REGISTER Write outputs phase 0 Read-back outputs phase 0 R/W 0 1 ADDRESS CODE (HEX) 0x01 REGISTER DATA D7 OP7 D6 OP6 D5 OP5 D4 OP4 D3 OP3 D2 OP2 D1 OP1 D0 OP0
Table 9. Blink Phase 1 Register
REGISTER Write outputs phase 1 Read-back outputs phase 1 R/W 0 1 ADDRESS CODE (HEX) 0x09 REGISTER DATA D7 OP7 D6 OP6 D5 OP5 D4 OP4 D3 OP3 D2 OP2 D1 OP1 D0 OP0
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 10. PWM Application Scenarios
APPLICATION All outputs static without PWM RECOMMENDED CONFIGURATION Set the master, O8 intensity register 0x0E to any value from 0x00 to 0x0F. The global intensity G bit in the configuration register is don't care. The output intensity registers 0x10 through 0x13 are don't care. Set the master, O8 intensity register 0x0E to any value from 0x10 to 0xFF. Clear global intensity G bit to 0 in the configuration register to disable global intensity control. For the static outputs, set the output intensity value to 0xF. For the PWM outputs, set the output intensity value in the range 0x0 to 0xE. As above. Global intensity control cannot be used with a mix of static and PWM outputs, so write the individual intensity registers with the same PWM value. Set the master, O8 intensity register 0x0E to any value from 0x10 to 0xFF. Set global intensity G bit to 1 in the configuration register to enable global intensity control. The master, O8 intensity register 0x0E is the only intensity register used. The output intensity registers 0x10 through 0x13 are don't care.
A mix of static and PWM outputs, with PWM outputs using different PWM settings
A mix of static and PWM outputs, with PWM outputs all using the same PWM setting
All outputs PWM using the same PWM setting
ONE PWM PERIOD IS 240 CYCLES OF THE 32kHz PWM OSCILLATOR. A PWM PERIOD CONTAINS 15 MASTER INTENSITY TIMESLOTS
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
15 16 1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
1
2
EACH MASTER INTENSITY TIMESLOT CONTAINS 16 PWM CYCLES
Figure 11. PWM Timing
.
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
.
14
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
1
2
.
Figure 12. Master Set to 1/15
Figure 14. Master Set to 15/15
.
14 15 1
2
3
4
5
6
7
8
9 10 11 12 13 14
15 1
2
.
Figure 13. Master Set to 14/15
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
MASTER INTENSITY TIMESLOT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 NEXT MASTER INTENSITY TIMESLOT 6 7 8 9 10 11 12 13 14 15 16
Figure 15. Individual (or Global) Set to 1/16
MASTER INTENSITY TIMESLOT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5
NEXT MASTER INTENSITY TIMESLOT 6 7 8 9 10 11 12 13 14 15 16
Figure 16. Individual (or Global) Set to 15/16
MASTER INTENSITY TIMESLOT CONTROL IS IGNORED 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Figure 17. Individual (or Global) Set to 16/16
Table 11. PWM Intensity Settings (Blink Disabled)
OUTPUT (OR GLOBAL) INTENSITY SETTING 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF PWM DUTY CYCLE OUTPUT BLINK PHASE 0 REGISTER BIT = 0 LOW TIME 1/16 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 Static low HIGH TIME 15/16 14/16 13/16 11/16 10/16 9/16 8/16 7/16 6/16 5/16 4/16 3/16 2/16 1/16 Static low Highest PWM intensity Full intensity, no PWM (LED on continuously) Increasing PWM intensity 12/16 LED BEHAVIOR WHEN OUTPUT BLINK PHASE 0 REGISTER BIT = 0 (LED IS ON WHEN OUTPUT IS LOW) Lowest PWM intensity PWM DUTY CYCLE OUTPUT BLINK PHASE 0 REGISTER BIT = 1 LOW TIME 15/16 14/16 13/16 12/16 11/16 10/16 9/16 8/16 7/16 6/16 5/16 4/16 3/16 2/16 1/16 Static high impedance HIGH TIME 1/16 2/16 3/16 4/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 Static high impedance Lowest PWM intensity LED off continuously Increasing PWM intensity 5/16 LED BEHAVIOR WHEN OUTPUT BLINK PHASE 0 REGISTER BIT = 1 (LED IS ON WHEN OUTPUT IS LOW) Highest PWM intensity
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
where: RLED is the resistance of the resistor in series with the LED (). VSUPPLY is the supply voltage used to drive the LED (V). VLED is the forward voltage of the LED (V). VOL is the output low voltage of the MAX7315 when sinking ILED (V). ILED is the desired operating current of the LED (A). For example, to operate a 2.2V red LED at 14mA from a 5V supply, RLED = (5 - 2.2 - 0.25) / 0.014 = 182. outputs are turned on and off together. Do not use output O8 as part of a load-sharing design. O8 cannot be switched at the same time as any of the other outputs because it is controlled by a different register. The MAX7315 must be protected from the negative voltage transient generated when switching off inductive loads, such as relays, by connecting a reversebiased diode across the inductive load (Figure 18). The peak current through the diode is the inductive load's operating current.
Driving Load Currents Higher than 50mA
The MAX7315 can be used to drive loads drawing more than 50mA, like relays and high-current white LEDs, by paralleling outputs. Use at least one output per 50mA of load current; for example, a 5V 330mW relay draws 66mA and needs two paralleled outputs to drive it. Ensure that the paralleled outputs chosen are controlled by the same blink phase register, i.e., select outputs from the P0 through P7 range. This way, the paralleled
Power-Supply Considerations
The MAX7315 operates with a power-supply voltage of 2V to 3.6V. Bypass the power supply to GND with at least 0.047F as close to the device as possible. For the QFN version, connect the underside exposed pad to GND.
Chip Information
TRANSISTOR COUNT: 17,611 PROCESS: BiCMOS
Table 12. PWM Intensity Settings (Blink Enabled)
OUTPUT (OR GLOBAL) INTENSITY SETTING PWM DUTY CYCLE OUTPUT BLINK PHASE X REGISTER BIT = 0 LOW TIME 1/16 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 Static low HIGH TIME 15/16 14/16 13/16 12/16 11/16 10/16 9/16 8/16 7/16 6/16 5/16 4/16 3/16 2/16 1/16 Static low PWM DUTY CYCLE OUTPUT BLINK PHASE X REGISTER BIT = 1 LOW TIME 15/16 14/16 13/16 12/16 11/16 10/16 9/16 8/16 7/16 6/16 5/16 4/16 3/16 2/16 1/16 HIGH TIME 1/16 2/16 3/16 4/16 5/16 6/16 7/16 8/16 9/16 10/16 11/16 12/16 13/16 14/16 15/16 Phase 0: LED on continuously Phase 1: LED off continuously Phase 0: LED off continuously Phase 1: LED on continuously Phase 0: LED on at high intensity Phase 1: LED on at low intensity Phase 0: LED on at low intensity Phase 1: LED on at high intensity Output is half intensity during both blink phases Phase 0: LED on at low intensity Phase 1: LED on at high intensity Phase 0: LED on at high intensity Phase 1: LED on at low intensity EXAMPLES OF LED BLINK BEHAVIOR (LED IS ON WHEN OUTPUT IS LOW) BLINK PHASE 0 REGISTER BIT = 0 BLINK PHASE 1 REGISTER BIT = 1 BLINK PHASE 0 REGISTER BIT = 1 BLINK PHASE 1 REGISTER BIT = 0
0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xA 0xB 0xC 0xD 0xE 0xF
Static high Static high impedance impedance
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 13. Master, O8 Intensity Register
REGISTER R/W MASTER AND GLOBAL INTENSITY Write master and global intensity Read back master and global intensity Master intensity duty cycle is 0/15 (off); internal oscillator is disabled; all outputs will be static with no PWM Master intensity duty cycle is 1/15 Master intensity duty cycle is 2/15 Master intensity duty cycle is 3/15 -- Master intensity duty cycle is 13/15 Master intensity duty cycle is 14/15 Master intensity duty cycle is 15/15 (full) O8 intensity duty cycle is 1/16 O8 intensity duty cycle is 2/16 O8 intensity duty cycle is 3/16 -- O8 intensity duty cycle is 14/16 O8 intensity duty cycle is 15/16 O8 intensity duty cycle is 16/16 (static output, no PWM) 0 1 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0X0E ADDRESS CODE (HEX) REGISTER DATA D7 MSB MASTER INTENSITY M3 M2 M1 M0 G3 D6 D5 D4 LSB D3 MSB O8 INTENSITY G2 G1 G0 D2 D1 D0 LSB
0 0 0 0 -- 1 1 1 -- -- -- -- -- -- --
0 0 0 0 -- 1 1 1 -- -- -- -- -- -- --
0 0 1 1 -- 0 1 1 -- -- -- -- -- -- --
0 1 0 1 -- 1 0 1 -- -- -- -- -- -- --
-- -- -- -- -- -- -- -- 0 0 0 -- 1 1 1
-- -- -- -- -- -- -- -- 0 0 0 -- 1 1 1
-- -- -- -- -- -- -- -- 0 0 1 -- 0 1 1
-- -- -- -- -- -- -- -- 0 1 0 -- 1 0 1
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 14. Output Intensity Registers
REGISTER ADDRESS CODE (HEX) R/W REGISTER DATA D7 MSB 0 1 -- -- -- -- -- -- -- 0X10 D6 D5 D4 LSB D3 MSB D2 D1 D0 LSB
OUTPUTS P1, P0 INTENSITY Write output P1, P0 intensity Read back output P1, P0 intensity Output P1 intensity duty cycle is 1/16 Output P1 intensity duty cycle is 2/16 Output P1 intensity duty cycle is 3/16 -- Output P1 intensity duty cycle is 14/16 Output P1 intensity duty cycle is 15/16 Output P1 intensity duty cycle is 16/16 (static logic level, no PWM) Output P0 intensity duty cycle is 1/16 Output P0 intensity duty cycle is 2/16 Output P0 intensity duty cycle is 3/16 -- Output P0 intensity duty cycle is 14/16 Output P0 intensity duty cycle is 15/16 Output P0 intensity duty cycle is 16/16 (static logic level, no PWM)
OUTPUT P1 INTENSITY P1I3 0 0 0 -- 1 1 1 P1I2 0 0 0 -- 1 1 1 P1I1 0 0 1 -- 0 1 1 P1I0 0 1 0 -- 1 0 1
OUTPUT P0 INTENSITY P0I3 -- -- -- -- -- -- -- P0I2 -- -- -- -- -- -- -- P0I1 -- -- -- -- -- -- -- P0I0 -- -- -- -- -- -- --
-- -- -- -- -- -- --
-- -- -- -- -- -- --
-- -- -- -- -- -- --
-- -- -- -- -- -- --
-- -- -- -- -- -- --
0 0 0 -- 1 1 1
0 0 0 -- 1 1 1
0 0 1 -- 0 1 1
0 1 0 -- 1 0 1
OUTPUTS P3, P2 INTENSITY Write output P3, P2 intensity Read back output P3, P2 intensity 0 1 0x11
MSB
LSB
MSB
LSB
OUTPUT P3 INTENSITY P3I3 P3I2 P3I1 P3I0
OUTPUT P2 INTENSITY P2I3 P2I2 P2I1 P2I0
OUTPUTS P5, P4 INTENSITY Write output P5, P4 intensity Read back output P5, P4 intensity 0 1 0x12
MSB
LSB
MSB
LSB
OUTPUT P5 INTENSITY P5I3 P5I2 P5I1 P5I0
OUTPUT P4 INTENSITY P4I3 P4I2 P4I1 P4I0
OUTPUTS P7, P6 INTENSITY Write output P7, P6 intensity Read back output P7, P6 intensity OUTPUT O8 INTENSITY 0 1 0x13
MSB
LSB
MSB
LSB
OUTPUT P7 INTENSITY P7I3 P7I2 P7I1 P7I0
OUTPUT P6 INTENSITY P6I3 P6I2 P6I1 P6I0
See the master, O8 intensity register (Table 13).
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8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Table 15. MAX7311, PCA9535, and PCA9555 Register Compatibility
PCA9534, PCA9554(A) REGISTER Inputs Outputs Polarity inversion Configuration No registers No register No register No registers ADDRESS 0x00 0x01 0x02 0x03 0x0B 0x0E 0x0F 0x10-0x13 MAX7313 IMPLEMENTATION Inputs registers Blink phase 0 registers Not implemented; register writes are ignored; register reads return 0x00 Ports configuration registers Blink phase 1 registers Master and global/O8 intensity register Configuration register Outputs intensity registers MAX7311, PCA9535, PCA9555 IMPLEMENTATION Implemented Implemented Implemented; power-up default is 0x00 Not implemented Not implemented Not implemented Not implemented Not implemented Power-up default disables the blink and intensity (PWM) features COMMENTS Same functionality Same functionality If polarity inversion feature is unused, MAX7313 defaults to correct state Same functionality
2V TO 3.6V 5V 0.047F V+ SDA SCL P0 P1
Pin Configurations (continued)
TOP VIEW
AD0 1 AD1 2 AD2 3 BAS16 P0 4 P1 5 P2 6 P3 7 GND 8 16 V+ 15 SDA 14 SCL
C SDA SCL
MAX7315
P2 P3 P4 P5
MAX7315AEE MAX7315AUE
13 INT/O8 12 P7 11 P6 10 P5 9 P4
I/O
INT/O8 AD0 AD1 AD2 GND
P6 P7
QSOP/TSSOP
Typical Application Circuit
Figure 18. Diode-Protected Switching Inductive Load
3.3V 5V
0.047F V+ SDA SCL P0 P1
C SDA SCL
MAX7315
P2 P3 P4 P5 INPUT 1 INPUT 2 5V 3.3V
I/O
INT/O8 AD0 AD1 AD2
P6 P7
OUTPUT1 GND OUTPUT2
______________________________________________________________________________________
23
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
QSOP.EPS
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
21-0055
E
1
1
24
______________________________________________________________________________________
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
D2 b
MAX7315
0.10 M C A B
D D/2
D2/2
E/2
E2/2
C L
E
(NE - 1) X e
E2
L
C L
e
k (ND - 1) X e
C L
0.10 C 0.08 C A A2 A1 L
C L
L
e
e
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
1
2
EXPOSED PAD VARIATIONS
DOWN BONDS ALLOWED
NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.
PACKAGE OUTLINE 12, 16L, THIN QFN, 3x3x0.8mm
21-0136
E
2
2
______________________________________________________________________________________
12x16L QFN THIN.EPS
25
8-Port I/O Expander with LED Intensity Control, Interrupt, and Hot-Insertion Protection MAX7315
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
26 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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